TraceCurrent

Understanding PCB Trace Ampacity & Thermal Limits

Printed circuit board (PCB) trace ampacity is the maximum continuous electrical current a copper trace can carry without overheating beyond allowable thermal limits. Every ampere passing through a copper trace generates heat due to resistive losses (I²R). If a trace is undersized, excessive T_rise can delaminate copper from the FR-4 dielectric substrate, melt solder joints, or cause catastrophic trace fusing.

IPC-2221 vs. IPC-2152: Which Standard Should You Use?

For decades, PCB engineers relied on IPC-2221 (derived from legacy MIL-HDBK-275 data published in 1954). While simple and conservative, IPC-2221 is based on isolated copper traces suspended in unconstrained environments without accounting for board thickness or nearby copper planes.

IPC-2152 ("Standard for Determining Current Carrying Capacity in Exterior and Interior Layers of Printed Boards") was released to replace IPC-2221 with thousands of hours of empirical laboratory testing. Key differences include:

• Internal vs. External Layers: IPC-2221 halves the allowable current on internal layers. That figure was never measured — the external values were simply doubled — and IPC-2152’s testing contradicted it: FR-4 conducts heat better than air (≈ 0.25 W/m·K against about 0.026 for still air), so buried traces run cooler than external traces in still air. IPC-2152 uses one chart for both positions, and this tool follows it: IPC-2152 applies no internal-layer derating. Under IPC-2221, by contrast, an internal trace needs 2.6× the external width for the same current.
• Copper Thickness: The universal chart is drawn for 3 oz copper on 0.070 in polyimide. Thinner copper spreads the same cross-section over a wider trace with more surface area, so it needs less of it: the published multiplier for 1 oz is 0.84 of the chart value.
• Thermal Ground Plane Proximity: Solid copper ground planes on adjacent layers act as heat sinks. If a thermal plane is within 0.5 mm (20 mils), trace ampacity increases by up to 40% for the same temperature rise.
• Board Thickness & Substrate Mass: Thicker PCBs conduct heat away from traces more effectively than ultra-thin 0.8mm flex or 2-layer boards.

This calculator implements the universal chart and the copper-thickness multiplier. It does not apply IPC-2152’s board-thickness, material, altitude or de-rating modifiers, each of which is published only as a chart. Applying them by hand to the cross-sectional area this tool reports is the intended workflow for a board that departs from the baseline construction.

Core Mathematical Formulas

The fundamental ampacity formula defined in IPC-2221 is:

I = k · ΔT^0.44 · A^0.725

Where:

• I = Maximum current in Amperes
• ΔT = Allowable temperature rise above ambient (°C)
• A = Cross-sectional area of trace in mils²
• k = Derating constant (0.048 for external layers, 0.024 for internal layers)

To calculate required cross-sectional area A from target current I:

A = ( I / (k · ΔT^0.44) )^{1 / 0.725}

IPC-2152 is not a power law. Its universal chart is empirical, and its current exponent moves with temperature rise — about 1.81 at a 10°C rise, 1.77 at 20°C — so no single k and fixed area exponent can stand in for it. This tool uses the published closed-form fit to that chart, which reproduces it to within 3%:

A_chart = (117.555 · ΔT^-0.913 + 1.15) · I^{(0.84 · ΔT-0.108 + 1.159)}

That result is the area for the chart’s 3 oz baseline copper. The copper-thickness multiplier is then applied, log-linear between the two published anchors (0.84 at 1 oz, 1.00 at 3 oz) and held flat below 1 oz:

A = A_chart · 0.84^{(1 - log₃ oz)}

Reading the two standards side by side at 10 A and a 20°C rise in 1 oz external copper: IPC-2221 asks for 256 mil², the IPC-2152 chart for 431 mil². IPC-2152 becomes the more demanding of the two above about 1.7 A at a 10°C rise and about 2.6 A at 20°C, and the gap widens from there. Below those currents IPC-2221 is the conservative choice.

Once area A is known, required trace width W is derived from copper thickness T (where 1 oz copper ≈ 1.378 mils or 35 µm):

W = A / T

High-Current PCB Design Strategies (> 10 Amperes)

When trace widths calculated exceed 300 mils (7.62 mm) or currents exceed 10A, standard copper traces become impractical. Professional PCB layout engineers employ several mitigation techniques:

1. Polygon Copper Pours: Replace thin traces with wide copper fills or entire power planes to minimize resistance and spread thermal load.
2. Heavy Copper Weights: Specify 2 oz, 3 oz, or 4 oz outer/inner copper layers during PCB fabrication. Doubling copper thickness cuts required trace width in half.
3. Soldermask Openings & Solder Fill: Remove soldermask over high-current traces to expose bare copper, allowing automated wave soldering or hand soldering to build up a thick tin-lead or SAC305 solder layer.
4. Bus Bars & Surface-Mount Copper Jumpers: Solder heavy copper or brass bus bars directly onto high-current traces on motor controllers, inverter power stages, or power distribution boards.
5. Parallel Trace Layers with Thermal Vias: Route identical power traces across multiple layers connected with a dense grid of stitched thermal vias.